Fix dcr.pp and psr.pp support (non-VTI) so pfmon --system-wide works

Signed-off by: Dan Magenheimer <dan.magenheimer@hp.com>

diff --git a/xen/arch/ia64/linux-xen/setup.c b/xen/arch/ia64/linux-xen/setup.c
index b31f22ae354aa8da838e2109fbe87e981f8a71ab..ba7f91098dcb67887a54981ddeaaa1eba9d86448 100644 (file)
--- a/xen/arch/ia64/linux-xen/setup.c
+++ b/xen/arch/ia64/linux-xen/setup.c
@@ -824,8 +824,13 @@ cpu_init (void)
         * shouldn't be affected by this (moral: keep your ia32 locks aligned and you'll
         * be fine).
         */
+#ifdef XEN
+       ia64_setreg(_IA64_REG_CR_DCR,  (  IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
+                         | IA64_DCR_PP | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
+#else
        ia64_setreg(_IA64_REG_CR_DCR,  (  IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
                                        | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
+#endif
        atomic_inc(&init_mm.mm_count);
        current->active_mm = &init_mm;
 #ifdef XEN

diff --git a/xen/arch/ia64/xen/hyperprivop.S b/xen/arch/ia64/xen/hyperprivop.S
index dd8de48c2da98ac06c1988581636193d13d932d2..cb314386fbee72a5b40e6bd8cb17b04d4a9fda90 100644 (file)
--- a/xen/arch/ia64/xen/hyperprivop.S
+++ b/xen/arch/ia64/xen/hyperprivop.S
@@ -261,7 +261,8 @@ ENTRY(hyper_ssm_i)
        ;;
        // FOR SSM_I ONLY, also turn on psr.i and psr.ic
        movl r28=(IA64_PSR_DT|IA64_PSR_IT|IA64_PSR_RT|IA64_PSR_I|IA64_PSR_IC);;
-       movl r27=~(IA64_PSR_BE|IA64_PSR_PP|IA64_PSR_BN);;
+//     movl r27=~(IA64_PSR_BE|IA64_PSR_PP|IA64_PSR_BN);;
+       movl r27=~(IA64_PSR_BE|IA64_PSR_BN);;
        or r30=r30,r28;;
        and r30=r30,r27;;
        adds r21=XSI_IPSR_OFS-XSI_PSR_IC_OFS,r18 ;;

diff --git a/xen/arch/ia64/xen/vcpu.c b/xen/arch/ia64/xen/vcpu.c
index d650301242e94beb834badd046d8e98382f087ef..5e2a92d5ac74ba308aee39db7da438f093cee0ad 100644 (file)
--- a/xen/arch/ia64/xen/vcpu.c
+++ b/xen/arch/ia64/xen/vcpu.c
@@ -191,7 +191,12 @@ IA64FAULT vcpu_reset_psr_sm(VCPU *vcpu, UINT64 imm24)
                        return (IA64_ILLOP_FAULT);
        if (imm.dfh) ipsr->dfh = 0;
        if (imm.dfl) ipsr->dfl = 0;
-       if (imm.pp) { ipsr->pp = 0; psr.pp = 0; }
+       if (imm.pp) {
+               ipsr->pp = 1;
+               psr.pp = 1;     // priv perf ctrs always enabled
+// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
+               PSCB(vcpu,tmp[8]) = 0;  // but fool the domain if it gets psr
+       }
        if (imm.up) { ipsr->up = 0; psr.up = 0; }
        if (imm.sp) { ipsr->sp = 0; psr.sp = 0; }
        if (imm.be) ipsr->be = 0;
@@ -233,7 +238,11 @@ IA64FAULT vcpu_set_psr_sm(VCPU *vcpu, UINT64 imm24)
        if (imm24 & ~mask) return (IA64_ILLOP_FAULT);
        if (imm.dfh) ipsr->dfh = 1;
        if (imm.dfl) ipsr->dfl = 1;
-       if (imm.pp) { ipsr->pp = 1; psr.pp = 1; }
+       if (imm.pp) {
+               ipsr->pp = 1; psr.pp = 1;
+// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
+               PSCB(vcpu,tmp[8]) = 1;
+       }
        if (imm.sp) { ipsr->sp = 1; psr.sp = 1; }
        if (imm.i) {
                if (!PSCB(vcpu,interrupt_delivery_enabled)) {
@@ -284,7 +293,15 @@ IA64FAULT vcpu_set_psr_l(VCPU *vcpu, UINT64 val)
        // however trying to set other bits can't be an error as it is in ssm
        if (newpsr.dfh) ipsr->dfh = 1;
        if (newpsr.dfl) ipsr->dfl = 1;
-       if (newpsr.pp) { ipsr->pp = 1; psr.pp = 1; }
+       if (newpsr.pp) {
+               ipsr->pp = 1; psr.pp = 1;
+// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
+               PSCB(vcpu,tmp[8]) = 1;
+       }
+       else {
+               ipsr->pp = 1; psr.pp = 1;
+               PSCB(vcpu,tmp[8]) = 0;
+       }
        if (newpsr.up) { ipsr->up = 1; psr.up = 1; }
        if (newpsr.sp) { ipsr->sp = 1; psr.sp = 1; }
        if (newpsr.i) {
@@ -331,6 +348,9 @@ IA64FAULT vcpu_get_psr(VCPU *vcpu, UINT64 *pval)
        else newpsr.i = 0;
        if (PSCB(vcpu,interrupt_collection_enabled)) newpsr.ic = 1;
        else newpsr.ic = 0;
+// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
+       if (PSCB(vcpu,tmp[8])) newpsr.pp = 1;
+       else newpsr.pp = 0;
        *pval = *(unsigned long *)&newpsr;
        return IA64_NO_FAULT;
 }

diff --git a/xen/include/public/arch-ia64.h b/xen/include/public/arch-ia64.h
index 05900bfa0b86bf789e4c2f1e1b0903ad447f5673..d25ec18fcf6b4dd477842e9c93392900ad7f394f 100644 (file)
--- a/xen/include/public/arch-ia64.h
+++ b/xen/include/public/arch-ia64.h
@@ -229,6 +229,7 @@ typedef struct {
            unsigned long krs[8];       // kernel registers
            unsigned long pkrs[8];      // protection key registers
            unsigned long tmp[8];       // temp registers (e.g. for hyperprivops)
+               // FIXME: tmp[8] temp'ly being used for virtual psr.pp
          };
         };
 #if 0